1. Field of the Invention
The present invention relates to a semiconductor device with a double junction structure, and more specifically to a MOS transistor capable of reducing the hot carrier effect and the occurrence of junction leakage current in the source and drain regions.
2. Description of Related Art
In general, with the development of highly integrated circuits, there are various problems that must be solved. FIG.1 is a cross-sectional view illustrating a conventional MOSFET. In FIG. 1, reference numeral 1 denotes a silicon substrate, 2 a gate oxide layer, 3 a gate electrode, 4 a source region and 5 a drain region.
The driving voltage of semiconductor device may not decrease exactly in proportion to the scale down of the highly integrated device. Accordingly, an electric field applied to the drain region 4 may increase such that the device deteriorates due to the hot carriers generated in the depletion region in the drain region 4, and due to the leakage current between the source region 5 and the silicon substrate 1.
The hot carriers occur in the high electric field, such as nearby the drain region 4 of the field effect transistor and the gate insulating layer 2. If the hot carriers get higher energy than the potential barrier of the gate insulating layer, they are injected into the gate insulating layer and then trapped therein. The trapped hot carriers forming the space charges alter the device's characteristics, such as the threshold voltage of the device.